Application Engineer I: Formal Verification

1 Hour ago • All levels

Job Summary

Job Description

The Application Engineer I: Formal Verification will be trained to become an expert in Formal Verification methodologies within the System Verification Group. This role involves providing technical support to customers using tools like Jasper, Xcelium, and others, focusing on RTL-level verification products. Responsibilities include troubleshooting customer issues, creating solutions, collaborating with R&D, writing application notes, and using scripting languages. The engineer will also participate in pre-sales technical campaigns, working with Sales and Marketing, to support customer success by providing guidance on best practices and innovative solutions to challenging industry problems. This role involves 40 hours a week with competitive benefits.
Must have:
  • Bachelor's degree in related fields
  • Excellent verbal and written English and Portuguese communication
  • Good problem-solving skills
  • Strong interpersonal and communication skills
  • Interest in EDA, hardware development, and Logic Design.
Good to have:
  • Experience in scripting languages (TCL, Python)
  • Exposure to RTL (Verilog or VHDL)
  • Knowledge of Formal Methods
  • Experience in verification methodologies
Perks:
  • Competitive benefits

Job Details

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence Design Systems Inc. is looking for a motivated Application Engineer I: Formal Verification to work with us in Belo Horizonte, Brazil.

As an Application Engineer, you will be trained to become an expert in Formal Verification methodologies in the System Verification Group - Technical Field Operations group (TFO-SVG) in Belo Horizonte. The TFO-SVG group works with Jasper, Xcelium, Palladium, Protium, VIPs, and other Cadence Digital Functional Verification tools. The application engineers provide technical support, enabling customers to effectively deploy our industry-leading technology, focused on RTL-level verification products. You will be in a Formal Verification focused team working with our Jasper Formal Verification Platform and its customers to understand their needs and provide guidance on the best technologies and methodologies to enable their success, coming up with innovative solutions to address the industry most challenging problems.

Job Description:

  • Activities focused on the Formal Verification field as mentioned above, reporting to higher management.
  • Provide technical support to customers and field personnel in RTL verification solutions focused on the Jasper tool.
  • Conduct root cause analysis and provide resolution to customer technical issues.
  • Run customer test cases to verify problems, create workarounds when possible, test and deliver R&D fixes.
  • Close collaboration with R&D on issues using established protocols.
  • Author application notes and help provide feedback on documentation.
  • Use scripting languages like TCL and Python for flow development, automation and enhancing design methodologies.
  • Engage with AE team on Pre-sales technical campaigns from the technical side, working along with Sales and Marketing.

Requirements:

  • Complete Bachelor in Electrical Engineering, Control and Automation Engineering, Systems Engineering, Electronics Engineering, Computer Science, Information Systems, Computational Mathematics, or related areas.
  • Excellent verbal and written communications skills in Portuguese and English.
  • Good problem-solving skills.
  • Strong inter-personal and communication skills.
  • A strong interest in contributing to customer success with related technical interest in EDA, hardware development (HDL's), and Logic Design.

Nice to have:

  • Experience in scripting languages such as TCL and Python is a plus.
  • Exposure to RTL (Verilog or VHDL).
  • Knowledge of Formal Methods is a plus.
  • Exposure to microelectronics and or EDA, with experience on verification methodologies as formal verification, functional verification (simulation), or model verification. Knowledge of Cadence verification tools is a plus.

Additional Job Details:

  • Employment category: CLT.
  • Employment term: 40 hours/week.
  • Competitive benefits.
  • Av. do Contorno, 5800, Belo Horizonte, Minas Gerais, Brazil

About Cadence Design Systems:

At Cadence, we hire and develop leaders and innovators who want to impact the world of technology. Cadence has been nominated as a Great Place to Work globally and in Brazil and is also a Fortune 100 Best Companies to Work For.

Cadence is the only company that provides the expertise and tools, IP, and hardware required for the entire electronics design chain, from chip design to chip packaging to boards and to systems. We enable electronic systems and semiconductor companies to create innovative products that transform the way people live, work, and play. Our products are used in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. For more information, access http://www.cadence.com .

We’re doing work that matters. Help us solve what others can’t.

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About The Company

Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence.

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