Senior Design Engineer, Silicon

As a Senior Design Engineer, Silicon at Google, you'll be part of a team developing custom silicon solutions for Google's direct-to-consumer products. Responsibilities include defining microarchitecture details (interface protocol, block diagram, data flow, pipelines), performing RTL development (SystemVerilog) and integration (Perl), debugging simulations, and conducting RTL quality checks (Lint, CDC, RDC, Synthesis, UPF). You'll contribute to innovation, delivering high-performance, efficient, and integrated hardware experiences. Minimum qualifications include a Bachelor's degree in Electrical Engineering or Computer Science (or equivalent experience) and 3 years of RTL design experience with Verilog/SystemVerilog and microarchitecture, along with experience in low-power schemes and RTL quality sign-off flows.