Senior Silicon Design Library Verification Engineer
Job Summary
Job Description
Microsoft seeks a Senior Silicon Design Library Verification Engineer to join its Central Front-End Tools, Flows, and Methodology (TFM) group. This role involves owning and maintaining global design/verification library components, managing releases to multiple SoC projects, and providing leadership to the design community. Responsibilities include working with stakeholders to collect library design requirements, developing and integrating common design and verification IP, collaborating with EDA vendors, and mentoring junior team members. The ideal candidate will have 6+ years of experience in front-end digital design and verification, strong Verilog/SV/UVM experience, and expertise in design compilation, simulation tools, and flows. Experience with IP packaging, release, and qualification is also crucial.
Must have:
- 6+ years in Front-End Digital Design & Verification
- Verilog/SV/UVM based IP development experience
- Expertise in design compile, simulation tools & flows
- IP packaging, release & qualification
- Ownership of design/verification IPs
Good to have:
- MS in relevant field
- Standard cells, memories, behavioral modeling knowledge
- Frontend qualification (lint, cdc, rdc, synth, low power)
- Understanding design functionality and connectivity
- Experience with FE VLSI design cycle
3 skills required
Job Details
Overview
The Microsoft Silicon Engineering and Solutions Team is seeking passionate, driven and intellectually curious engineers to join our Central Front-End Tools, Flows and Methodology (TFM) group. This team drives state-of-the-art converged solutions, automation, and quality assurance checks across front-end areas like Global Design Libraries, RTL & VIP Design, Design Verification, Validation, Simulation/Debug, Coverage and SoC integration. This team supports numerous simultaneous projects within Microsoft by developing workflows and software for our Design/Verification engineers so that they can deliver cutting-edge silicon solutions for Microsoft.
Qualifications
Required:
- BS in Electrical Engineering, Computer Engineering, Computer Science, or equivalent work experience.
- 6+ years of experience in FrontEnd Digital Design and Verification.
- Well-rounded and familiar with most Front-End Tools, Flows and Methodologies.
- Strong Experience working with Verilog/SV/UVM based IP development.
- Experience with Logic Design Compilation, Simulation tools and flows
- Expertise in one of the following areas:
- Design compile, elaboration and filelist/libraries handling.
- IP packaging, release and qualification
- IP integration
Additional Preferred:
- MS in Electrical Engineering, Computer Engineering, Computer Science or equivalent work experience.
- 8+ years of relevant experience.
- Strong background in owning and maintaining design/verification IPs End to end and handling releases.
- Good understanding with Standard cells, memories and behavioral modeling of design.
- Hands on expertise getting an IP through Frontend qualification (lint, cdc, rdc, synth, low power..) and successful release.
- Exposure to understand design functionality of existing IP, understand connectivity and apply incremental improvements.
- Good background and exposure to FE VLSI design cycle.
- Hands on experience working with IP Design simulation debug flows.
#SCHIEINDIA
#AHSI
Responsibilities
For all CAD roles, you will:
- Be part of a central FE CAD team that drives common FE methodologies for SoC and IP design.
- Be the expert in your domain and act in partnership with the execution team.
- Independently own, drive and maintain Global Design/Verification Library components and manage releases to multiple SoC projects.
- Provide leadership to the design community for the CAD domain for which you are responsible.
- Work with stakeholders across the Microsoft Silicon group to collect library design requirements.
- Develop, enhance, and integrate common design and verification IP for organization-wide use.
- Work with EDA vendors to adopt the most optimal solutions for silicon verification and design.
- Mentor junior team members and summer interns.
Similar Jobs
ByteDance
Seattle, Washington, United States (On-Site)
• 5 Months ago
NVIDIA
Santa Clara, California, United States (On-Site)
• 2 Months ago
Riot Games
Sydney, New South Wales, Australia (On-Site)
• 10 Months ago
NVIDIA
Pune, Maharashtra, India (On-Site)
• 4 Weeks ago
Sunnyvale, California, United States (On-Site)
• 3 Days ago
Get notifed when new similar jobs are uploaded
Similar Skill Jobs
Warsaw, Masovian Voivodeship, Poland (On-Site)
• 3 Days ago
Bengaluru, Karnataka, India (On-Site)
• 3 Days ago
Warner Bros Games
Bengaluru, Karnataka, India (Hybrid)
• 2 Weeks ago
Hawk Eye Innovations
Basingstoke, England, United Kingdom (Hybrid)
• 3 Weeks ago
Get notifed when new similar jobs are uploaded
Jobs in Bengaluru, Karnataka, India
PwC
Kolkata, West Bengal, India (On-Site)
• 6 Months ago
Normalyze
Bengaluru, Karnataka, India (Remote)
• 4 Months ago
Get notifed when new similar jobs are uploaded
Research & Development Jobs
ByteDance
Singapore (On-Site)
• 5 Months ago
Mountain View, California, United States (On-Site)
• 3 Days ago
Hyderabad, Telangana, India (On-Site)
• 3 Days ago
Tel Aviv-Yafo, Tel Aviv District, Israel (On-Site)
• 3 Days ago
Easygo
Melbourne, Victoria, Australia (On-Site)
• 2 Weeks ago
ByteDance
Seattle, Washington, United States (On-Site)
• 5 Months ago
Get notifed when new similar jobs are uploaded
About The Company
Microsoft is a tech giant that develops, licenses, and supports a range of software products, services, and devices.
Get notified when new jobs are added by Microsoft
