Senior Silicon Design Library Verification Engineer

The Microsoft Silicon Engineering and Solutions Team is seeking passionate, driven and intellectually curious engineers to join our Central Front-End Tools, Flows and Methodology (TFM) group. This team drives state-of-the-art converged solutions, automation, and quality assurance checks across front-end areas like Global Design Libraries, RTL & VIP Design, Design Verification, Validation, Simulation/Debug, Coverage and SoC integration. This team supports numerous simultaneous projects within Microsoft by developing workflows and software for our Design/Verification engineers so that they can deliver cutting-edge silicon solutions for Microsoft.   

For all CAD roles, you will:    

• Be part of a central FE CAD team that drives common FE methodologies for SoC and IP design.  
• Be the expert in your domain and act in partnership with the execution team.  
• Independently own, drive and maintain Global Design/Verification Library components and manage releases to multiple SoC projects.  
• Provide leadership to the design community for the CAD domain for which you are responsible.  
• Work with stakeholders across the Microsoft Silicon group to collect library design requirements.  
• Develop, enhance, and integrate common design and verification IP for organization-wide use.   
• Work with EDA vendors to adopt the most optimal solutions for silicon verification and design.  
• Mentor junior team members and summer interns.