ASIC Power Management Architect, Silicon

As an ASIC Power Management Architect at Google, you will be responsible for defining the power management architecture for ASICs, including image compute, CPU/GPU, focusing on maximum performance within power and thermal constraints. You will prototype and validate next-generation SoC power management systems across various design levels. This includes analyzing implementations and models, testing power management solutions, and creating detailed documentation and trade-off analyses. Collaboration with software and power architecture teams to build system-level designs is crucial. The role requires a minimum of 5 years of experience in power management or post-silicon measurements and validation, with 3 years specifically in power management validation. A Bachelor's degree in Electrical Engineering or equivalent is required.