Senior Staff Engineer - IP Design

1 Month ago • 10-12 Years • Software Development & Engineering

Job Summary

Job Description

The Senior Staff Engineer will be responsible for delivering standards-compliant IP blocks for CXL/PCIE in FPGAs or ASICs, leading ASIC or FPGA projects, and streamlining the ASIC development process. The role involves designing, developing, and documenting the design using Verilog and the verification environment using System Verilog and UVM, developing test cases, and managing bug reports. The engineer will also be involved in staffing, employee development, and fostering teamwork. This position reports to the Director of the Design Team.
Must have:
  • Deliver IP blocks for CXL / PCIE in FPGAs or ASICs
  • Lead ASIC or FPGA projects
  • Solid experience with VHDL, Verilog, and System Verilog
  • Experience with FPGA compilation tools
  • Experience in System Verilog and UVM
  • Excellent ability to use Randomized and Directed Verification Methodologies
  • Experience with Unix/Linux Shell scripting
  • Experience with source code revisioning systems
Good to have:
  • Experience in CXL / PCIE
  • Experience in OTN / Ethernet transport systems
  • Experience with Debugging Tools
  • Experience with TCL, Python and C/C++ programming
Perks:
  • Competitive Compensation Package
  • Restricted Stock Units (RSUs)
  • Provisions to pursue advanced education from Premium Institute, eLearning content providers
  • Medical Insurance and a cohort of Wellness Benefits
  • Educational Assistance
  • Advance Loan Assistance
  • Office lunch & Snacks Facility

Job Details

The Opportunity We're looking for the Wavemakers of tomorrow. Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology. What You'll Do
  • Deliver standards-compliant IP blocks for use in CXL / PCIE FPGAs or ASICs.
  • Lead ASIC or FPGA projects
  • Streamline ASIC development process with advancing tools/scripting.
  • Achieve project management.
  • Architect, develop and document the design using Verilog.
  • Architect, develop and document the verification environment using System Verilog and UVM.
  • Develop individual test-cases against the RTL.
  • Issue and track bug reports from inception to closure.
  • Plan staffing levels and work with HR to hire and top talent.
  • Provide oversight and direction to employees following our procedures.
  • Develop staff, including overseeing new employee onboarding and provide career development planning and opportunities.
  • Empower employees to manage their jobs and goals. Delegate responsibility and expect accountability and regular feedback.
  • Foster a spirit of teamwork and unity among department members that allows for disagreement over ideas, conflict and expeditious conflict resolution, and the appreciation of diversity and cohesiveness, supportiveness, and working together to enable each employee and the department to succeed.
  • You will be reporting to the Director of the Design Team.
What You'll Need
  • MSEE with 12+ years of experience or BSEE with 10 years of experience in ASIC or FPGA development and will report to Director -VLSI.
  • Standard Protocol knowledge – CXL and PCIE.
  • Solid experience with VHDL, Verilog and System Verilog.
  • Experience with FPGA compilation tools
  • Experience in System Verilog and UVM
  • Excellent ability to use Randomized and Directed Verification Methodologies
  • Experience with Unix/Linux Shell scripting
  • Experience with source code revisioning systems, SVN, CVS, RCS e.g.
It'd Be Amazing If You Had
  • Experience in CXL / PCIE
  • Experience in OTN / Ethernet transport systems
  • Experience with Debugging Tools
  • Experience with TCL, Python and C/C++ programming
About You
  • Achieve consistency
  • Take personal pride in high standard of outputs
  • Mentoring skills
''We have a flexible work environment to support and help employees thrive in personal and professional capacities" As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes:
  • Competitive Compensation Package
  • Restricted Stock Units (RSUs)
  • Provisions to pursue advanced education from Premium Institute, eLearning content providers
  • Medical Insurance and a cohort of Wellness Benefits
  • Educational Assistance
  • Advance Loan Assistance
  • Office lunch & Snacks Facility
Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process.

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About The Company

Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data demanding industries today including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission critical data communication, our innovative technologies, and proven track record.

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