Package Design Engineer

1 Month ago • 5-10 Years • Manufacturing

About the job

SummaryBy Outscal

Must have:
  • Flip Chip Packages
  • Cadence APDF
  • Electrical Simulation
  • Design for Manufacturing
Good to have:
  • Multi-chip Packages
  • IR Drop Reports
  • S-parameter Data
  • Design Tool Evaluation
Perks:
  • Hybrid Work Model
  • Equity Compensation
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About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

The Marvell packaging organization is responsible for supporting customers with advanced package designs that meet challenging electrical requirements. Many of the new designs are requiring multi-chip and multiple component configurations driving advanced technology requirements.

What You Can Expect

As a Marvell Packaging Design Engineer, you will be responsible of the following:

  • Hands on physical implementation of package designs to align with product electrical design requirements and supplier manufacturing groundrules

  • Running of electrical and physical checking tools

  • Optimizing the package design process with new innovative solutions for efficiency and quality.

This will require:

  • Close interaction with electrical simulation engineers to optimize the design

  • Close interaction with the operations team and fabrication suppliers to meet design for manufacturing requirements

  • Other related tasks, such as new design tool evaluations, flow development, libraries usage and maintenance

The ideal candidate would meet the following requirements:

  • Design experience on flip chip packages

  • Proficient in Cadence APD

  • Familiar with interpreting electrical simulation results such as IR Drop reports and S-parameter data, ability to run basic checks

  • Able to organize their work to meet specific milestones

  • Able to work well in a team

What We're Looking For

Bachelor’s degree in Electrical Engineering or related fields and 5-10 years of related professional experience.
Master’s degree and/or PhD in Electrical Engineering or related fields with 3-5 years of experience.

#LI-TD1

Expected Base Pay Range (USD)

113,480 - 170,000, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements 

At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.

This role is eligible for our hybrid work model in which you will be able to split time between working from home and on-site in a Marvell office.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

View Full Job Description
$113.5K - $170.0K/yr (Outscal est.)
$141.7K/yr avg.
Santa Clara, California, United States

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