Package Development, Signal Integrity and Power Integrity Engineer, Staff

2 Months ago • 5-8 Years

About the job

Job Description

Marvell seeks a skilled Package Development Engineer with expertise in high-speed IC packaging, signal and power integrity, and EM simulation tools like Ansys HFSS and SI-Wave. Experience with 2.5D/3D package development, scripting tools like Python, and VNA/TDR measurements is highly desired.
Must have:
  • High-speed IC
  • Signal Integrity
  • Power Integrity
  • EM Simulation
Good to have:
  • 2.5D/3D Package
  • Scripting Tools
  • VNA/TDR
  • Package Development
Perks:
  • Hybrid Work
  • Equity Compensation
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About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

Marvell’s Central Engineering team is seeking a talented High-speed IC package development engineer to contribute to the development of advanced
The Marvell packaging organization is responsible for supporting customers with advanced package designs that meet challenging electrical requirements. Many of the new designs are requiring multi-chip and multiple component configurations driving advanced technology requirements.

What You Can Expect

Marvell’s Central Engineering team is seeking a talented High-speed IC package development engineer to contribute to the development of advanced microelectronic packages for semiconductors supporting 448 Gb/s data rates and beyond. The engineer will be responsible for package development, electrical design, modeling, and characterization, including all signal and power integrity aspects while considering manufacturing and assembly tolerances. The engineer will also interface with package suppliers to select package technology, drive layout, ensure manufacturability, and compliance with performance, reliability, and cost requirements. The engineer will interface with marketing and IC designers to develop achievable package specs and contribute to new package technology development.

What We're Looking For

  • Bachelor’s degree in Electrical Engineering and 5 - 8 years of related professional experience or Master’s/PhD in Electrical Engineering with 1-3 years of experience.
  • Strong fundamentals in EM, transmission lines and microwave theory
  • Experience in using 2-D and 3-D EM simulation tools such as Ansys HFSS, SI-Wave, Cadence Clarity
  • Ability to manage package development involving various cross functional teams like assembly development, IC physical layout teams, Analog and Digital designers, marketing.
  • Familiarity with IC package layout tools like APD or PADS
  • Experience with 2.5D/3D package development is highly desired.
  • Ability to automate the SI, PI and Packaging activities using scripting tools like Python.
  • Working knowledge of circuit design tools: Spectre, ADS, HSpice
  • Experience with VNA and TDR measurements for package and PCB characterization
  • Frequency domain and time domain knowledge of high speed signaling
  • Experience with high-speed electronic packaging for digital and analog ICs
  • Power plane design, modeling and analysis using tools like PowerSI, SIwave
  • Familiarity with packaging technologies, materials, package substrate design rules and assembly rules
  • Understanding, debugging and simulations of EMI/EMC problems
  • Track record of new product introduction from concept, through development and production is a plus.
  • Knowledge of the thermal and mechanical analysis of the IC package development is a plus.
  • Experience with channel simulations using MATLAB or ADS or other tools is a plus.
  • A team player
  • Strong communication, presentation, and documentation skills

Expected Base Pay Range (USD)

93,720 - 140,400, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements 

At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.

This role is eligible for our hybrid work model in which you will be able to split time between working from home and on-site in a Marvell office.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

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View Full Job Description
$93.7K - $140.4K/yr (Outscal est.)
$117.1K/yr avg.
Santa Clara, California, United States

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