Senior Engineer II - Analog Layout

23 Hours ago • 6 Years +

Job Summary

Job Description

The Senior Engineer II - Analog Layout will lead layout design activities, collaborating closely with the design team to produce high-quality IPs/AMS Blocks/Macros. Responsibilities include area estimation, floor planning, placement, routing, power planning, verification, EMIR, ESD-LUP verification, and tape out activities. The role also involves mentoring junior engineers and developing scripts. The candidate will report to the Manager of Layout Design. The company is looking for a person who is dedicated to produce high quality IPs/AMS Blocks/Macros
Must have:
  • 6+ years of experience in Analog Layout
  • Bachelor's degree in electrical engineering
  • Understanding of low parasitic, high frequency design techniques
  • Excellent understanding of analog layout concepts
  • Experience in handling blocks and macros layout
  • Experience with Finfet process and lower nodes in TSMC foundry
  • Experience with multiple foundries in lower node
  • Experience with Cadence, Synopsys, Calibre, and ICV tools
  • Experience with EMIR, PERC tools
  • Skill/TCL scripting experience
Perks:
  • Competitive Compensation Package
  • Restricted Stock Units (RSUs)
  • Provisions to pursue advanced education
  • Medical Insurance and a cohort of Wellness Benefits
  • Educational Assistance
  • Advance Loan Assistance
  • Office lunch & Snacks Facility

Job Details

The Opportunity
We're looking for the Wavemakers of tomorrow.

Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology.

What you'll do:

  • Lead layout design activity and work closely with design team.
  • Produce high quality IPs/AMS Blocks/Macros.
  • Drive Area estimation, floor planning, placement, routing, power planning, verification, EMIR, ESD-LUP verification and tape out activity.
  • Mentor Junior Analog IC Layout engineers.
  • Develop scripts.
  • You will be reporting to Manager-Layout Design

What you'll need:

  • 6+ years of experience in Analog Layout.
  • Minimum Education requirement is bachelor's degree in electrical engineering.
  • Understanding of low parasitic, high frequency design techniques.
  • Excellent understanding of analog layout concepts and issues.
  • Experience in handling blocks and macros layout towards successful, high-quality, and timely execution
  • Experience with Finfet process and lower nodes like 2nm/3nm/5nm/7nm in TSMC foundry.
  • Experience with multiple foundries in lower node eg: Samsung, TSMC, GF.
  • Experience with Cadence tools (Virtuoso), Synopsys (CC), Calibre and ICV verification tools like LVS, DRC, Extraction etc.
  • Experience with EMIR, PERC tools.
  • Skill/TCL scripting experience.

"We have a flexible work environment to support and help employees thrive in personal and professional capacities"

As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes:

  • Competitive Compensation Package
  • Restricted Stock Units (RSUs)
  • Provisions to pursue advanced education from Premium Institute, eLearning content providers
  • Medical Insurance and a cohort of Wellness Benefits
  • Educational Assistance
  • Advance Loan Assistance
  • Office lunch & Snacks Facility

Equal Employment Opportunity Statement

Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process.

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About The Company

We work to create silicon that enables the highest performing, most reliability and lowest power digital communication networks.

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