High Performance DSP core Implementation Engineer, Sr Staff

2 Days ago • 4-13 Years

Job Summary

Job Description

As a High Performance DSP core Implementation Engineer at Qualcomm, you will be involved in planning, designing, optimizing, verifying, and testing electronic systems. This includes working with circuits, mechanical systems, digital/analog/RF/optical systems, and various testing systems to launch cutting-edge products. The role involves collaboration with cross-functional teams and requires experience in RTL, UPF & Physical aware Synthesis for cutting edge technology nodes, logic equivalence checking, Scripting and Netlist Timing Signoff. Responsibilities include rolling out robust Logic Synthesis, UPF synthesis, QoR optimization and netlist Signoff flows, providing implementation flows support and issue debugging services and developing and maintaining 3rd party tool integration and product enhancement routines. The engineer is expected to lead implementation flow development and drive new tool evaluation and methodology refinement for PPA optimization.

Must have:

Bachelor's degree in relevant field and 4+ years of hardware engineering.
Proficiency in Python/Tcl scripting language.
Familiarity with Synthesis tools like Fusion Compiler/Genus.
Expertise in VLSI front end design steps- Verilog/VHDL and Synthesis.
Experience in RTL, UPF & Physical aware Synthesis

Good to have:

Fair knowledge in Logic Equivalence Checking tools
Familiarity with standard software engineering practices like Version Control.

4 skills required

4 skills required for this role

Add these skills to join the top 1% applicants for this job

python

fpga

cross-functional

problem-solving

Job Details

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.
OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.

Job Description

Additional Job Description

Additional Job Description

Job Role

* Work with multiple SOC Design teams to rollout robust Logic Synthesis, UPF synthesis, QoR optimization and netlist Signoff flows
* Provide implementation flows support and issue debugging services
to SOC design teams across various site
* Develop and maintain 3rd party tool integration and product
enhancement routines

* Should lead implementation flow development effort independently by working closely with design team and EDA vendors

* Should drive new tool evaluation, methodology refinement for PPA optimization

Skill Set

* Proficiency in Python/Tcl

* Familiar with Synthesis tools (Fusion Compiler/Genus),

* Fair knowledge in LEC, LP signoff tools
* Proficient in VLSI front end design steps- Verilog/VHDL, Synthesis, QoR optimization & Equivalence Checking
* Familiarity with standard software engineering practices like Version
Control, Configuration Management, Regression is a plus
* Should be sincere, dedicated and willing to take up new challenges

Experience

13+ years of experience in RTL,UPF & Physical aware Synthesis for cutting edge technology nodes, logic equivalence checking, Scripting and Netlist Timing Signoff

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