Staff RFIC Physical Design Engineer

1 Month ago • 4 Years + • Software Development & Engineering

Job Summary

Job Description

The Staff RFIC Physical Design Engineer will lead the physical layout of complex RFICs, define and enforce layout methodologies, collaborate with teams to ensure optimal performance, and drive technical reviews. They will also mentor engineers and own the layout lifecycle. This role involves full layout responsibilities, including DRC/LVS/PEX sign-off and optimization. The engineer will be involved in developing next-generation RFIC products for the IoT wireless space. They will be working within a dynamic design team.
Must have:
  • Lead RFIC physical layout.
  • Define and enforce layout methodologies.
  • Collaborate with teams for optimal performance.
  • Drive technical reviews and mentor engineers.
  • Own the full layout lifecycle.
Good to have:
  • Scripting and automation using SKILL, Python, or TCL.
  • Familiarity with advanced process nodes (e.g., 16nm, 7nm) and 3DIC/heterogeneous integration.
  • Knowledge of EM simulation tools and their integration into layout flows.
  • Exposure to RFIC design principles.

Job Details


Company:

Qualcomm Technologies International Ltd

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

We are searching for a Staff level radio frequency integrated circuit (RFIC)/Analogue layout engineer to join a strong group of RFIC designers to help lead Qualcomm in the development of RF transceivers to address the IoT market. Working within a dynamic design team you will participate in the development of next generation RFIC products in the IoT wireless space. 

RESPONSIBILITIES:

  • Lead the physical layout of complex RFICs.
  • Define and enforce layout methodologies, best practices, and quality standards across the layout team.
  • Collaborate with RFIC design, packaging, and verification teams to ensure optimal performance and manufacturability.
  • Drive technical reviews, mentor junior and senior layout engineers, and provide layout planning support to project lead.
  • Own the full layout lifecycle from floorplanning to tape-out, including DRC/LVS/PEX sign-off and post-layout optimization.

PROFILE:

  • Highly motivated, pro-active self-starter
  • Strong sense of ownership and responsibility
  • Creative thinker with strong problem-solving skills
  • Team oriented attitude
  • Ability to thrive in a multicultural environment
  • Ability to communicate well with cross-functional teams
  • Excellent written and oral communications skills

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

REQUIRED EXPERIENCE:

  • 10+ years of hands-on RFIC layout experience in advanced CMOS and/or BiCMOS technologies.
    • Full appreciation of RF and analogue layout techniques in low geometry nodes (22nm or lower)
  • Proven leadership in delivering multiple successful RFIC tape-outs, including high-frequency and mixed-signal designs.
  • Experience leading layout teams or acting as a technical authority in layout methodology and execution across multiple geographical locations.
  • Fluent English speaker

REQUIRED DETAILED KNOWLEDGE:

  • Expert-level proficiency in Cadence Virtuoso and advanced layout techniques for RF blocks (LNAs, mixers, VCOs, PAs, PLLs).
  • Deep understanding of parasitic-aware layout, matching, shielding, isolation, and substrate noise mitigation.
  • Strong command of DRC, LVS, and PEX flows, including debugging and optimization.
  • Familiarity with ESD, latch-up prevention, and reliability-aware layout practices.
  • Experience with layout planning for high-density, high-performance RFICs.

PREFERRED DETAILED KNOWLEDGE:

  • Scripting and automation using SKILL, Python, or TCL to enhance layout productivity.
  • Familiarity with advanced process nodes (e.g., 16nm, 7nm) and 3DIC/heterogeneous integration.
  • Knowledge of EM simulation tools (e.g., HFSS, Momentum) and their integration into layout flows.

ADDITIONAL USEFUL EXPERIENCE:

  • Exposure to RFIC design principles and ability to interpret schematics and simulation results.
  • Contributions to EDA tool evaluation, layout methodology development, or academic publications.
  • Cross-site collaboration and experience working in global teams.

KEY WORDS:

  • CMOS
  • IoT
  • RF and analogue layout
  • Cadence
  • +10 years’ experience in RFIC design

*References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.

If you would like more information about this role, please contact Qualcomm Careers.

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