Graduate Talent (ISCP SV Design Verification Engineer)

Job Description:

• Develops pre-silicon functional validation strategy, test plan, test suite, test methodologies for state-of-the-art SoC/chipset.
• Collaborates with architects, micro-architects, design and system validation teams for SoC validation strategy, technical readiness and failure disposition.
• Performs low level and complex debug for multiple systems, subsystems within a product, or at the SoC level for Intel products.
• Applies deep understanding of SoC design, architecture, firmware, and software to resolve triage failures, marginality issues, and conduct root cause analysis.
• Defines, develops, and implements techniques for faster debug at the SoC and platform level and isolates failing components of a system.

Qualifications:

• Graduates from Bachelor / Master's degree in Electrical and/or Electronic Engineering, Computer or Microelectronic Engineering.
• Knowledge on Computer System Architecture and/or related software-hardware sub-systems.
• Knowledge on software programming in Python, Maestro/Perspec, C and/or C++ language and UNIX, automate verification flow and improve efficiency.
• Emulation/Silicon/FPGA debug, RTL, UPF and logic design.
• Strong analytical and problem-solving skills.
• Excellent communication and teamwork abilities.
• A passion for technology and innovation.
• Eagerness to learn and adapt in a fast-paced environment.