Mixed Signal IC Layout Designer

2 Months ago • Upto 5 Years • Design

Job Summary

Job Description

The Mixed Signal IC Layout Designer will work closely with design engineers to complete the layout and verification of high-performance mixed-signal CMOS Integrated Circuits using Cadence Virtuoso XL and Mentor's Calibre tools. The role involves generating topological layouts to ensure optimal circuit performance and troubleshooting layout design issues. The responsibilities include designing analog mix signal layouts, understanding device matching techniques, signal conditioning/protection techniques, and collaborating effectively with engineers. The successful candidate will also need excellent layout planning and integration skills.
Must have:
  • Layout analog circuitry in a size/time constrained environment
  • Understand layout techniques like common centroid, matching, isolation, etc.
  • Solve design problems using technical skills, intuition, and creativity
  • Proficiency in floor planning activities and block assembly
  • LVS trouble shooting and debug skills
  • Work effectively in a fast-paced team-oriented environment
Good to have:
  • Bachelor's Degree in Electronic Engineering or related program
  • Comfortable with multiple IC design CAD tools and foundry PDKs
  • Contribute ideas for improved efficiency and automation

Job Details

For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal processing. Our rockstar team thrives on solving complex challenges with innovative end-user solutions for the world's top consumer brands. Cirrus Logic is also known for its award-winning culture, which was built on a foundation of inclusion and fairness, meaningful community engagement, and delivering enjoyable employee experiences at every turn. But we couldn’t do it without our extraordinary workforce – and that’s where you come in. Join our team and help us continue to make Cirrus Logic an exceptional place to grow your career! 

In this position, you will work closely with design engineering to complete the layout and verification of high-performance mixed-signal CMOS Integrated Circuits using Cadence Virtuoso XL and Mentor's Calibre tools, and work with circuit engineers to generate topological layouts to ensure optimal circuit performance.

Responsibilities

    • Troubleshooting layout design issues and applying proactive intervention
    • Work closely with design engineers to ensure proper circuit performance
    • Design analog mix signal layout
    • Understand device matching techniques
    • Understand signal conditioning/protection techniques
    • Excellent collaboration skills, including written and verbal communication
    • Outstanding layout planning and integration skills

Required Skills and Qualifications

    • Associates Degree in Electronic/IC layout CAD specialization or related program and 0-5 years of IC layout experience
    • Ability to layout analog circuitry in a size/time constrained environment
    • Understand layout techniques such as common centroid, matching, isolation, shielding, and the use of dummy devices
    • Ability to solve design problems while using a combination of technical skills, intuition, and creativity
    • Proficiency in floor planning activities with block assembly, and block level routing
    • LVS trouble shooting and debug skills.
    • Proven ability to work in a fast paced team-oriented environment
    • Great teammate who works well with others

Preferred Skills and Qualifications

    • Bachelors Degree in Electronic Engineering or related program
    • Comfortable with multiple IC design CAD tools and foundry PDKs
    • Demonstrated ability to contribute ideas for improved efficiency and automation of layout tasks
#LI-TM1
#LI-Hybrid

Cirrus Logic strives to select the best qualified applicant for any opening. Different approaches, ideas and points of view are both valued and respected. Employment decisions are made on the basis of job-related criteria without regard to race, color, religion, sex, national origin, age, protected veteran or disabled status, genetic information, or any other classification protected by applicable law. 

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