As an integral part of Intel's new Integrated Device Manufacturer 2.0 (IDM2.0) strategy, we are establishing Foundry Services (FS), a fully vertical, stand-alone foundry business, reporting directly to the CEO. Foundry Services will be a world-class foundry business and major provider of US and European based capacity to serve customers globally. 

Foundry Services will be differentiated from other foundries with a combination of leading-edge packaging and process technology, committed capacity in the US and Europe, and a world-class IP portfolio that customers can choose from, including x86 cores, graphics, media, display, AI, interconnect, fabric and other critical foundational IP's, along with Arm and RISC-V ecosystem IPs. Foundry Services will also provide access to silicon design services to help our customers seamlessly turn silicon into solutions, using industry standard design packages. 

This business unit is completely dedicated to the success of its customers with full PandL responsibilities. This model will ensure that our foundry customers' products receive our utmost focus in terms of service, technology enablement, and capacity commitments. FS is already engaged with customers today starting with our existing foundry offerings. We are expanding at a torrid pace to include our most advanced technologies, which are ideal for high-performance applications. 

The Silicon Packaging Design Engineer’s job responsibilities will include but not limited to: 

• Drives end-to-end development for substrate design from concept through tape-out and implements physical layout and routing of the package design. 

• Follows substrate design rules, conducts routing studies to establish design, performance, and cost tradeoffs. 

• Works closely with silicon and hardware teams to optimize silicon/package/board performance and pinout. 

• Defines substrate design rules, conducts internal and external reviews, and resolves DRCs to optimize package design. 

• Completes documentation and collateral into the system of record tool. 

The minimum qualifications are required to be considered for this position. Minimum qualifications listed below would be obtained through a combination of industry relevant job experience, internship experience and / or schoolwork/classes/research. The preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.  

Minimum Qualifications 

Preferred Qualifications 

• Active US Government Security Clearance with a minimal of a Secret Level. 
• Post Graduate degree in Electrical / Mechanical or in a STEM related field of study. 
• Performing package I/O routing starting day one. 
• Strong analytical ability and problem-solving skills: identifying, isolating, and debugging issues and providing creative solutions.  
• Microelectronic package substrate technology development. 
• Package design tools such as Package Layout Automation (PLA) and FIELD. 
• Microelectronic package electrical modeling and simulation tools such as PowerDC, HyperLynx, Q3D, and HFSS. 
• Extract signal integrity and/or power delivery electrical models and run AC/DC/Frequency Domain simulations. 
• Scripting using Python, VB, C, and/or other language.