At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
BTech/ MTech in Engineering with 15 to 18 years of actual work experience in Hardware Design Architect.Worked on PCIE/LPDDR5/UCIE/Ethernet/MIPI Protocol Designs. Prepare SOC hardwareArchitecture Specification to Start the Design and Verification Implementation. Verilog / System-Verilog RTL logic design, debug, and functional verification supportN/AWe’re doing work that matters. Help us solve what others can’t.