Accelerator Post-Silicon Performance Validation Engineer

4 Months ago • 5 Years + • Quality Assurance

Job Summary

Job Description

Rivos Accelerator Performance team is looking for motivated individuals to conduct post-silicon performance validation for their accelerator design. The role involves performance validation and analysis of typical workloads on server compute silicon. Key responsibilities include analyzing workloads and their performance to drive optimization and correlation efforts, quantifying and analyzing the performance of server workloads like data analytics, graph algorithms, and AI/ML, and correlating measurements with simulation results. Collaboration with design, architecture, systems, and software teams is essential to enable enterprise customer use-case performance measurements. The role also involves silicon performance measurements, correlation with simulations, improving power/perf ratio through tuning, system-level performance debugging, and automating performance validation infrastructure.
Must have:
  • 5+ years in SoC bring-up and validation
  • Python or other scripting language experience
  • Object-oriented programming with C/C++
  • Silicon bring-up and validation experience
  • Familiarity with LLM/ML workloads
Good to have:
  • Experience with MLPerf benchmarks
  • Multi-functional collaboration experience
  • Strong communication, influence, and negotiation skills
  • Technical documentation skills
  • Proactive ownership and problem-solving
  • Creative solutions for lab validation

Job Details

Full job description

Rivos Accelerator Performance team is seeking highly motivated candidates to perform post-silicon performance validation activities for Rivos accelerator design. The primary role is to engage in performance validation and analysis of typical workloads on server compute silicon.

Key Responsibilities

As a Post-Silicon Performance Engineer, you will own or participate in the following:

* Analyze workloads and their performance to drive the performance analysis, optimization and correlation efforts on Rivos' accelerator design.
* Quantify and analyze performance of typical server workloads (data analytics, graph algorithms, and AI/ML), and correlate measurements with simulation results
* Collaborate cross-functionally with design, architecture, systems, and software teams to enable enterprise customer use-case performance measurements
* Perform silicon performance measurements and correlate with partition simulations and full-chip projections
* Improve use-case power/perf ratio through tuning of hardware and software settings
* System level performance debugging and silicon performance per watt tuning
* Automate performance validation infrastructure
* Develop and execute silicon characterization tests for the Rivos accelerator.

Minimum Qualifications
* 5+ years of hands-on experience in bring-up and validation of complex SoCs.
* Experience scripting in Python or other programming language.
* Experience in object-oriented programming with C and C++
* Experience in bringing up silicons, performing functional and performance validation, and debugging failures.
* Familiar with the LLM/ML workloads

Preferred Qualifications
* Knowledge and experience with common performance benchmarks such as MLPerf
* Experience working multi-functionally with people of very diverse backgrounds
* Demonstrated communication, influence, and negotiation skills
* Technical documentation skills
* Initiative in taking ownership & responsibility to drive deliverables
* Able to think outside the box and come with creative solutions for lab validation.

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Santa Clara, California, United States (Hybrid)

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Santa Clara, California, United States (Hybrid)

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